The options include the lumped path delay (LPD) model or NESTED CELL model for asynchronous FSM designs, and the use of D FLIP-FLOPs for synchronous FSM designs. The background for the use of ADAM is covered in Chapters 11, 14 and 16 of the REVISED 2nd Edition. [5] A-OPS design software: A-OPS (for Asynchronous One-hot Programmable Sequencers) is another very powerful productivity tool that permits the design of asynchronous and synchronous state machines by using a programmable sequencer kernel. This software generates a PLA or PAL output file (in Berkeley format) or the VHDL code for the automated timing-defect-free designs of the following: (a) Any 1-Hot programmable sequencer up to 10 states. (b) The 1-Hot design of multiple asynchronous or synchronous state machines driven by either PLDs or RAM. The input file is that of a state table for the desired state machine.-
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