資料來源: Google Book

CMOS PLLs and VCOs for 4G wireless

  • 作者: Aktas, Adem.
  • 其他作者: Ismail, Mohammed.
  • 出版: Boston : Kluwer 2004.
  • 稽核項: 1 online resource (xxiv, 174 pages) :illustrations.
  • 標題: TECHNOLOGY & ENGINEERING , TECHNOLOGY & ENGINEERING Electronics -- Solid State. , Wireless communication systems. , Voltage-controlled oscillators Design and construction. , Phase-locked loops. , Electronic books. , Metal oxide semiconductors, Complementary. , Voltage-controlled oscillators , ElectronicsSemiconductors. , ElectronicsSolid State. , TECHNOLOGY & ENGINEERING Electronics -- Semiconductors. , Design and construction.
  • ISBN: 1402080603 , 9781402080609
  • ISBN: 140208059X
  • 試查全文@TNUA:
  • 附註: Includes bibliographical references (pages 169-174) and index. Dedication. List of Figures. List of Tables. Preface. List of Acronyms. 1. Introduction -- 2. Overview of VCO/PLL for Wireless Communication -- 3. PLL Phase Noise Analysis -- 4. Broadband VCOs: System Design Considerations -- 5. Broadband VCOs: Circuit Design Considerations -- 6. Broadband VCOs: Practical Design Issues -- 7. 4GHz Broadband VCO: A Case Study -- 8. A PLL for GSM/WCDMA -- 9. PLLs for IEEE 802.11 a/b/g WLANs -- 10. RF CMOS Component Characterization -- 11. Conclusions -- Appendices -- A S-parameters to Y-parameters Transformation -- References -- Index.
  • 摘要: CMOS PLLs and VCOs for 4G Wireless is the first book devoted to the subject of CMOS PLL and VCO design for future broadband 4th generation wireless devices. These devices will be handheld-centric, requiring very low power consumption and small footprint. They will be able to work across multiple bands and multiple standards covering WWAN (GSM, WCDMA), WLAN(802.11 a/b/g) and WPAN(Bluetooth) with different modulations, channel bandwidths, phase noise requirements, etc. As such, this book discusses design, modeling and optimization techniques for low power fully integrated broadband PLLs and VCOs in deep submicron CMOS. First, the PLL and VCO performances are studied in the context of the chosen multi-band multi-standard, radio architecture and the adopted frequency plan. Next a thorough study of the design requirements for broadband PLL/VCO design is conducted together with modeling techniques for noise sources in a PLL and VCO focusing on optimization of integrated phase noise for multi-carrier OFDM 64-QAM type applications. Design examples for multi-standard 802.111a/b/g as well as for GSM/WCDMA are fully described and experimental results from 0.18 micron CMOS test chips have demonstrated the validity of the proposed design and optimization techniques. Equally important the work describes techniques for robust high volume production of RF radios in general and for integrated PLL/VCO design in particular including issues such as supply sensitivity, ground bounce and calibration mechanisms. CMOS PLLS and VCOs for 4G Wireless will be of interest to graduate students in electrical and computer engineering, design managers and RFIC designers in wireless semiconductor companies.
  • 電子資源: https://dbs.tnua.edu.tw/login?url=https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=118335
  • 系統號: 005311042
  • 資料類型: 電子書
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  • 引用網址: 複製連結
CMOS PLLs and VCOs for 4G Wireless is the first book devoted to the subject of CMOS PLL and VCO design for future broadband 4th generation wireless devices. These devices will be handheld-centric, requiring very low power consumption and small footprint. They will be able to work across multiple bands and multiple standards covering WWAN (GSM,WCDMA) ,WLAN(802.11 a/b/g) and WPAN(Bluetooth) with different modulations, channel bandwidths , phase noise requirements ,etc. As such, this book discusses design, modeling and optimization techniques for low power fully integrated broadband PLLs and VCOs in deep submicron CMOS. First, the PLL and VCO performances are studied in the context of the chosen multi-band multi-standard, radio architecture and the adopted frequency plan. Next a thorough study of the design requirements for broadband PLL/VCO design is conducted together with modeling techniques for noise sources in a PLL and VCO focusing on optimization of integrated phase noise for multi-carrier OFDM 64-QAM type applications. Design examples for multi-standard 802.111a/b/g as well as for GSM/WCDMA are fully described and experimental results from 0.18 micron CMOS test chips have demonstrated the validity of the proposed design and optimization techniques. Equally important the work describes techniques for robust high volume production of RF radios in general and for integrated PLL/VCO design in particular including issues such as supply sensitivity, ground bounce and calibration mechanisms. CMOS PLLS and VCOs for 4G Wireless will be of interest to graduate students in electrical and computer engineering, design managers and RFIC designers in wireless semiconductor companies.
來源: Google Book
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