SPARK :a parallelizing approach to the high-level synthesis of digital circuits
- 其他作者: Gupta, Sumit.
- 出版: Boston : Kluwer Academic Publishers 2004.
- 稽核項: 1 online resource (xxi, 233 pages) :illustrations.
- 標題: TECHNOLOGY & ENGINEERING , Circuits intégrés numériques Simulation par ordinateur. , TECHNOLOGY & ENGINEERING Electronics -- Circuits -- General. , Digital integrated circuits , TECHNOLOGY & ENGINEERING Electronics -- Circuits -- Integrated. , Conception et constructionInformatique. , Simulation par ordinateur. , Digital integrated circuits Design and construction -- Data processing. , ElectronicsCircuitsIntegrated. , Circuits intégrés numériques , Parallel processing (Electronic computers) , Parallélisme (Informatique) , ElectronicsCircuitsGeneral. , Electronic books. , Digital integrated circuits Computer simulation. , Design and constructionData processing. , SPARK (Electronic resource) , Circuits intégrés numériques Conception et construction -- Informatique. , Computer simulation.
- ISBN: 1402078382 , 9781402078385
- ISBN: 1402078374 , 9781402078378
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- 附註: Includes bibliographical references (pages 217-229) and index.
- 摘要: Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits presents a novel approach to the high-level synthesis of digital circuits -- that of parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. This PHLS approach addresses the problems of the poor quality of synthesis results and the lack of controllability over the transformations applied during the high-level synthesis of system descriptions with complex control flows, that is, with nested conditionals and loops. Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK's PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits is targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers.
- 電子資源: https://dbs.tnua.edu.tw/login?url=https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=118468
- 系統號: 005312152
- 資料類型: 電子書
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- 引用網址: 複製連結
Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits presents a novel approach to the high-level synthesis of digital circuits -- that of parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. This PHLS approach addresses the problems of the poor quality of synthesis results and the lack of controllability over the transformations applied during the high-level synthesis of system descriptions with complex control flows, that is, with nested conditionals and loops. Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK's PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits is targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers.
來源: Google Book
來源: Google Book
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