Comprehensive functional verification the complete industry cycle
- 作者: Wile, Bruce.
- 其他作者: Goss, John C. , Roesner, W.
- 出版: Amsterdam ;Boston : Elsevier/Morgan Kaufmann ©2005.
- 稽核項: 1 online resource (xiii, 676 pages) :illustrations.
- 叢書名: Morgan Kaufmann series in systems on silicon
- 標題: TECHNOLOGY & ENGINEERING , Electronic books. , TECHNOLOGY & ENGINEERING Electronics -- Circuits -- VLSI & ULSI. , TECHNOLOGY & ENGINEERING Electronics -- Circuits -- Logic. , Verification. , Computer engineering. , COMPUTERS , COMPUTERS Logic Design. , Integrated circuits Verification. , Electronic book. , ElectronicsCircuitsVLSI & ULSI. , ElectronicsCircuitsLogic. , Logic Design. , Integrated circuits
- ISBN: 0127518037 , 9780127518039
- ISBN: 0127518037
- 試查全文@TNUA:
- 附註: Includes bibliographical references (pages 657-662) and index. Cover -- Author Bios -- FOREWORD -- Table of contents -- PREFACE -- THE VERIFICATION CYCLE -- STRUCTURE OF THE BOOK -- BASIC KNOWLEDGE NEEDED FOR THIS BOOK -- EXERCISES AND SUPPORTING MATERIALS -- ACKNOWLEDGEMENTS -- PART I: INTRODUCTION TO VERIFICATION -- CHAPTER 1: VERIFICATION IN THE CHIP DESIGN PROCESS -- 1.1 INTRODUCTION TO FUNCTIONAL VERIFICATION -- 1.2 THE VERIFICATION CHALLENGE -- 1.3 MISSION AND GOALS OF VERIFICATION -- 1.4 COST OF VERIFICATION -- 1.5 AREAS OF VERIFICATION BEYOND THE SCOPE OF THIS BOOK -- 1.6 THE VERIFICATION CYCLE: A STRUCTURED PROCESS -- 1.7 SUMMARY -- 1.8 EXERCISES -- CHAPTER 2: VERIFICATION FLOW -- 2.1 VERIFICATION HIERARCHY -- 2.2 STRATEGY OF VERIFICATION -- 2.3 SUMMARY -- 2.4 EXERCISES -- CHAPTER 3: FUNDAMENTALS OF SIMULATION-BASED VERIFICATION -- 3.1 BASIC VERIFICATION ENVIRONMENT: A TEST BENCH -- 3.2 OBSERVATION POINTS: BLACK-BOX, WHITE-BOX, AND GREY-BOX VERIFICATION -- 3.3 ASSERTION-BASED VERIFICATION: AN OVERVIEW -- 3.4 TEST BENCHES AND TESTING STRATEGIES -- 3.5 SUMMARY -- 3.6 EXERCISES -- CHAPTER 4: THE VERIFICATION PLAN -- 4.1 THE FUNCTIONAL SPECIFICATION -- 4.2 THE EVOLUTION OF THE VERIFICATION PLAN -- 4.3 CONTENTS OF THE VERIFICATION PLAN -- 4.4 VERIFICATION EXAMPLE: CALC1 -- 4.5 SUMMARY -- 4.6 EXERCISES -- PART II: SIMULATION-BASED VERIFICATION -- CHAPTER 5: HARDWARE DESCRIPTION LANGUAGES AND SIMULATION ENGINES -- 5.1 HARDWARE DESCRIPTION LANGUAGES -- 5.2 SIMULATION ENGINES: INTRODUCTION -- 5.3 EVENT-DRIVEN SIMULATION -- 5.4 IMPROVING SIMULATION THROUGHPUT -- 5.5 CYCLE-BASED SIMULATION -- 5.6 WAVEFORM VIEWERS -- 5.7 SUMMARY -- 5.8 EXERCISES -- CHAPTER 6: CREATING ENVIRONMENTS -- 6.1 TEST BENCH WRITING TOOLS -- 6.2 VERIFICATION COVERAGE -- 6.3 SUMMARY -- 6.4 EXERCISES -- CHAPTER 7: STRATEGIES FOR SIMULATION-BASED STIMULUS GENERATION -- 7.1 CALC2 OVERVIEW -- 7.2 STRATEGIES FOR STIMULUS GENERATION -- 7.3 SUMMARY -- 7.4 EXERCISES -- CHAPTER 8: STRATEGIES FOR RESULTS CHECKING IN SIMULATION-BASED VERIFICATION -- 8.1 TYPES OF RES
- 電子資源: https://dbs.tnua.edu.tw/login?url=https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=130253
- 系統號: 005319739
- 資料類型: 電子書
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A key strength of this book is that it describes the entire verification cycle and details each stage. The organization of the book follows the cycle, demonstrating how functional verification engages all aspects of the overall design effort and how individual cycle stages relate to the larger design process. Throughout the text, the authors leverage their 35 plus years experience in functional verification, providing examples and case studies, and focusing on the skills, methods, and tools needed to complete each verification task. Additionally, the major vendors (Mentor Graphics, Cadence Design Systems, Verisity, and Synopsys) have implemented key examples from the text and made these available on line, so that the reader can test out the methods described in the text.
來源: Google Book
來源: Google Book
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