IC interconnect analysis
- 作者: Celik, Mustafa,
- 其他作者: Pileggi, Lawrence, , Odabasioglu, Altan,
- 出版: Boston, Mass. ;London : Kluwer Academic Publishers ©2002.
- 稽核項: 1 online resource (vii, 310 pages) :illustrations.
- 標題: Electronic books. , TECHNOLOGY & ENGINEERING , Interconnexions (Technologie des circuits intégrés) , COMPUTERS , TECHNOLOGY & ENGINEERING Electronics -- Circuits -- Logic. , Integrated circuits Ultra large scale integration -- Computer simulation. , ElectronicsCircuitsVLSI & ULSI. , Simulation par ordinateur. , TECHNOLOGY & ENGINEERING Electronics -- Circuits -- VLSI & ULSI. , COMPUTERS Logic Design. , Interconnexions (Technologie des circuits intégrés) Simulation par ordinateur. , Interconnects (Integrated circuit technology) Computer simulation. , Circuits intégrés à ultra-grande échelle Simulation par ordinateur. , Circuits intégrés à ultra-grande échelle , ElectronicsCircuitsLogic. , Computer simulation. , Logic Design. , Ultra large scale integrationComputer simulation. , Integrated circuits , Interconnects (Integrated circuit technology)
- ISBN: 0306479710 , 9780306479717
- ISBN: 0306479710 , 9781402070754 , 1402070756
- 試查全文@TNUA:
- 附註: Includes bibliographical references and index.
- 摘要: As integrated circuit (IC) feature sizes scaled below a quarter of a micron, thereby defining the deep submicron (DSM) era, there began a gradual shift in the impact on performance due to the metal interconnections among the active circuit components. Once viewed as merely parasitics in terms of their relevance to the overall circuit behavior, the interconnect can now have a dominant impact on the IC area and performance. Beginning in the late 1980's there was significant research toward better modeling and characterization of the resistance, capacitance and ultimately the inductance of on-chip interconnect. IC Interconnect Analysis covers the state-of-the-art methods for modeling and analyzing IC interconnect based on the past fifteen years of research. This is done at a level suitable for most practitioners who work in the semiconductor and electronic design automation fields, but also includes significant depth for the research professionals who will ultimately extend this work into other areas and applications. IC Interconnect Analysis begins with an in-depth coverage of delay metrics, including the ubiquitous Elmore delay and its many variations. This is followed by an outline of moment matching methods, calculating moments efficiently, and Krylov subspace methods for model order reduction. The final two chapters describe how to interface these reduced-order models to circuit simulators and gate-level timing analyzers respectively. IC Interconnect Analysis is written for CAD tool developers, IC designers and graduate students.
- 電子資源: https://dbs.tnua.edu.tw/login?url=https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=99371
- 系統號: 005321534
- 資料類型: 電子書
- 讀者標籤: 需登入
- 引用網址: 複製連結
As integrated circuit (IC) feature sizes scaled below a quarter of a micron, thereby defining the deep submicron (DSM) era, there began a gradual shift in the impact on performance due to the metal interconnections among the active circuit components. Once viewed as merely parasitics in terms of their relevance to the overall circuit behavior, the interconnect can now have a dominant impact on the IC area and performance. Beginning in the late 1980's there was significant research toward better modeling and characterization of the resistance, capacitance and ultimately the inductance of on-chip interconnect. IC Interconnect Analysis covers the state-of-the-art methods for modeling and analyzing IC interconnect based on the past fifteen years of research. This is done at a level suitable for most practitioners who work in the semiconductor and electronic design automation fields, but also includes significant depth for the research professionals who will ultimately extend this work into other areas and applications. IC Interconnect Analysis begins with an in-depth coverage of delay metrics, including the ubiquitous Elmore delay and its many variations. This is followed by an outline of moment matching methods, calculating moments efficiently, and Krylov subspace methods for model order reduction. The final two chapters describe how to interface these reduced-order models to circuit simulators and gate-level timing analyzers respectively. IC Interconnect Analysis is written for CAD tool developers, IC designers and graduate students.
來源: Google Book
來源: Google Book
評分