附註:Includes bibliographical references (pages 351-353) and index.
To Structured Electronic Design -- Synthesis of Accurate Amplifiers -- Negative Feedback -- Noise -- Nonlinear Distortion -- The Loop-Gain-Poles Product -- Frequency Compensation -- Biasing -- DC Sources -- Design Example.
摘要:Analog design is one of the more difficult aspects of electrical engineering. The main reason is the apparently vague decisions an experienced designer makes in optimizing his circuit. To enable fresh designers, like students electrical engineering, to become acquainted with analog circuit design, structuring the analog design process is of utmost importance. Structured Electronic Design: Negative-Feedback Amplifiers presents a design methodology for negative-feedback amplifiers. The design methodology enables to synthesize a topology and to, at the same time, optimize the performance of that topology. Key issues in the design methodology are orthogonalization, hierarchy and simple models. Orthogonalization enables the separate optimization of the three fundamental quality aspects: noise, distortion and bandwidth. Hierarchy ensures that the right decisions are made at the correct level of abstraction. The use of simple models, results in simple calculations yielding maximum-performance indicators that can be used to reject wrong circuits relatively fast. The presented design methodology divides the design of negative-feedback amplifiers in six independent steps. In the first two steps, the feedback network is designed. During those design steps, the active part is assumed to be a nullor, i.e. the performance with respect to noise, distortion and bandwidth is still ideal. In the subsequent four steps, an implementation for the active part is synthesized. During those four steps the topology of the active part is synthesized such that optimum performance is obtained. Firstly, the input stage is designed with respect to noise performance. Secondly, the output stage is designed with respect to clipping distortion. Thirdly, the bandwidth performance is designed, which may require the addition of an additional amplifying stage. Finally, the biasing circuitry for biasing the amplifying stages is designed. By dividing the design in independent design steps, the total glo
