CMOS memory circuits

  • 作者: Haraszti, Tegze P.
  • 出版: Boston : Kluwer Academic ©2000.
  • 稽核項: 1 online resource (xxii, 551 pages) :illustrations.
  • 標題: Circuits électroniques , Machine Theory. , COMPUTERS Machine Theory. , Computer Engineering. , Andre fag (naturvidenskab og teknik) Andre fag , COMPUTERS , HardwareGeneral. , Metal oxide semiconductors, Complementary , Circuits électroniques Calcul. , Calcul. , Electronic books. , COMPUTERS Hardware -- General. , COMPUTERS Computer Engineering. , Semiconductor storage devices , Metal oxide semiconductors, Complementary Design and construction. , Electronic circuit design. , Design and construction. , Semiconductor storage devices Design and construction.
  • ISBN: 6610205981 , 9786610205981
  • ISBN: 9780792379508 , 0792379500
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  • 附註: Includes bibliographical references and index. Cover -- Table of Contents -- Preface -- Conventions -- Chapter 1. Introduction to CMOS Memories -- 1.1 Classification and Characterization of CMOS Memories -- 1.2 Random Access Memories -- 1.3 Sequential Access Memories (SAMs) -- 1.4 Content Addressable Memories (CAMS) -- 1.5 Special Memories and Combinations -- 1.6 Nonranked and Hierarchical Memory Organizations -- Chapter 2. Memory Cells -- 2.1 Basics, Classifications and Objectives -- 2.2 Dynamic One-Transistor-One-Capacitor Random Access Memory Cell. -- 2.3 Dynamic Three-Transistor Random Access Memory Cell -- 2.4 Static 6-Transistor Random Access Memory Cell -- 2.5 Static Four-Transistor-Two-Resistor Random Access Memory Cells -- 2.6 Read-Only Memory Cells -- 2.7 Shift-Register Cells -- 2.8 Content Addressable Memory Cells -- 2.9 Other Memory Cells -- Chapter 3. Sense Amplifiers -- 3.1 Sense Circuits -- 3.2 Sense Amplifiers in General -- 3.3 Differential Voltage Sense Amplifiers -- 3.4 Current Sense Amplifiers -- 3.5 Offset Reduction -- 3.6 Nondifferential Sense Amplifiers -- Chapter 4. Memory Constituent Subcircuits -- 4.1 Array Wiring -- 4.2 Reference Circuits -- 4.3 Decoders -- 4.4 Output Buffers -- 4.5 Input Receivers -- 4.6 Clock Circuits -- 4.7 Power-Lines -- Chapter 5. Reliability and Yield Improvement -- 5.1 Reliability and Redundancy -- 5.2 Noises in Memory Circuits -- 5.3 Charged Atomic Particle Impacts -- 5.4 Yield and Redundancy -- 5.5 Fault-Tolerance in Memory Designs -- 5.6 Fault Repair -- 5.7 Error Control Code Application in Memories -- 5.8 Combination of Error Control Coding and Fault-Repair -- Chapter 6. Radiation Effects and Circuit Hardening -- 6.1 Radiation Effects -- 6.2 Radiation Hardening -- 6.3 Designing Memories in CMOS SOI (SOS) -- References.
  • 摘要: CMOS Memory Circuits is a systematic and comprehensive reference work designed to aid in the understanding of CMOS memory circuits, architectures, and design techniques. CMOS technology is the dominant fabrication method and almost the exclusive choice for semiconductor memory designers. Both the quantity and the variety of complementary-metal-oxide-semiconductor (CMOS) memories are staggering. CMOS memories are traded as mass-products worldwide and are diversified to satisfy nearly all practical requirements in operational speed, power, size, and environmental tolerance. Without the outstanding speed, power, and packing density characteristics of CMOS memories, neither personal computing, nor space exploration, nor superior defense systems, nor many other feats of human ingenuity could be accomplished. Electronic systems need continuous improvements in speed performance, power consumption, packing density, size, weight, and costs. These needs continue to spur the rapid advancement of CMOS memory processing and circuit technologies. CMOS Memory Circuits is essential for those who intend to (1) understand, (2) apply, (3) design and (4) develop CMOS memories.
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  • 系統號: 005322419
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