查詢 text:Very large scale integrationComputer-aided design. ，共 6 筆
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- 語言
- 英語(6)
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- 作者
- Bening, Lionel,(2)
- Foster, Harry,(2)
- Jess, Jochen.(1)
- Radecka, Katarzyna.(1)
- Reis, Ricardo A. L.(1)
- Sapatnekar, Sachin S.,(1)
- Sherwani, N. A.(1)
- Zilic, Zeljko.(1)
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- 資料類型
- 電子書(6)
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- 主題
- Integrated circuits(6)
- Very large scale integrationComputer-aided design.(6)
- COMPUTERS(5)
- TECHNOLOGY & ENGINEERING(5)
- ElectronicsCircuitsLogic.(4)
- ElectronicsCircuitsVLSI & ULSI.(4)
- Logic Design.(4)
- Circuits intégrés à très grande échelle(3)
- Computer-aided design.(3)
- Conception assistée par ordinateur.(3)
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6 0 0 0 0Design of system on a chip :devices & components
- 作者: Reis, Ricardo A. L.
- 出版: Boston : Kluwer Academic Publishers ©2004.
- 資料類型: 電子書
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8 0 0 0 0
Algorithms for VLSI physical design automation
- 作者: Sherwani, N. A.
- 出版: Boston : Kluwer Academic Publishers ©1999.
- 資料類型: 電子書
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4 0 0 0 0
Verification by error modeling :using testing techniques in hardware verification
- 作者: Radecka, Katarzyna.
- 出版: Boston : Kluwer Academic Publishers 2003.
- 資料類型: 電子書
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19 0 0 0 0
Timing
- 作者: Sapatnekar, Sachin S.,
- 出版: Boston : Kluwer Academic Publishers ©2004.
- 資料類型: 電子書
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14 0 0 0 0
Principles of verifiable RTL design :a functional coding style supporting verification processes in Verilog
- 作者: Bening, Lionel,
- 出版: Norwell, Mass. : Kluwer Academic Publishers ©2000.
- 資料類型: 電子書
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11 0 0 0 0
Principles of verifiable RTL design :a functional coding style supporting verification processes in Verilog
- 作者: Bening, Lionel,
- 出版: New York : Kluwer Academic ©2002.
- 資料類型: 電子書